System

The {{entity:Fusion Reactor Control System}} is in active decomposition. Sessions 387–388 covered the {{entity:Interlock and Emergency Shutdown System}} and {{entity:Disruption Prediction and Mitigation System}}. This session decomposes the {{entity:Plasma Control System}} — the highest-latency-criticality subsystem and the primary real-time control loop that maintains plasma equilibrium and shape. Six top-level subsystems remain undecomposed after this session.

Decomposition

The {{entity:Plasma Control System}} (hex {{hex:51F73A08}}) was broken into five components: the {{entity:Equilibrium Reconstruction Processor}} ({{hex:54F73208}}), {{entity:Shape and Position Controller}} ({{hex:51F53B08}}), {{entity:Vertical Stability Controller}} ({{hex:51F73B08}}), {{entity:MHD Mode Stabiliser}} ({{hex:55F53208}}), and {{entity:PCS Real-Time Data Bus}}.

The key architectural decision ({{arc:ARC-REQ-003}}) separates the {{entity:Vertical Stability Controller}} onto dedicated hardware. The VSC runs at 100 kHz on a standalone FPGA; everything else — ERP, SPC, MMS — runs at 10 kHz on the main PCS cluster connected via MARTe2 reflective memory. VDE growth rates of 50+ m/s require deterministic 50 μs response that cannot be guaranteed when FPGA resources are shared with the Grad-Shafranov solver under peak reconstruction load. A monolithic PCS was rejected because the VSC must remain operational during main PCS safe-state transitions; hardware separation achieves fault isolation at the cost of two additional inter-subsystem interfaces.

flowchart TB
  n0["Equilibrium Reconstruction Processor"]
  n1["Shape and Position Controller"]
  n2["Vertical Stability Controller"]
  n3["MHD Mode Stabiliser"]
  n4["PCS Real-Time Data Bus"]
  n0 -->|equilibrium state vector| n1
  n0 -->|q-profile| n3
  n1 -->|vertical position ref| n2
  n4 -->|10 kHz sync| n0
  n4 -->|10 kHz sync| n3

Analysis

The UHT classification surfaces a genuine engineering concern: ERP ({{hex:54F73208}}), SPC ({{hex:51F53B08}}), VSC ({{hex:51F73B08}}), and MMS ({{hex:55F53208}}) all carry the {{trait:Functionally Autonomous}} trait. Lint flagged all four as having no safety constraints. This is correct: autonomous FPGA control loops that can issue coil current commands without per-cycle human approval need a defined fail-safe state. {{sub:SUB-REQ-025}} addresses this — the PCS freezes all setpoints and asserts a safe-state signal to IESS within 10 ms on bus fault or self-test failure.

Lint also raised power-budget and Human-Interactive findings for the same components. Both are acknowledged classification artefacts: ERP/SPC/VSC/MMS are firmware modules in the PCS computing rack, not standalone physical devices. Power budgets belong at the rack level (Plant Control and I&C System). The lint scorer inferred Human-Interactive from contextual mentions of operator parameters but these components have no direct HMI.

Semantic search returned “closed-loop control system”, “PID controller”, and “Demand-Supply Convergence Controller” as cross-domain analogs for the ERP control loop — all functionally similar trait profiles ({{trait:Processes Signals/Logic}}, {{trait:State-Transforming}}, {{trait:Functionally Autonomous}}, {{trait:System-Essential}}) with no novel requirements gaps suggested. The NTM suppression architecture (q-profile-dependent ECCD steering) has no close analog in the corpus; the closest functional match is a phased-array beamsteering controller, which also uses real-time spatial estimation to steer an active output to a calculated target location.

Requirements

Eight subsystem requirements were created ({{sub:SUB-REQ-018}} through {{sub:SUB-REQ-025}}), three interface requirements ({{ifc:IFC-REQ-009}} through {{ifc:IFC-REQ-011}}), and four verification entries ({{ver:VER-REQ-010}} through {{ver:VER-REQ-013}}).

Key performance requirements: ERP delivers equilibrium state within 100 μs of each sample ({{sub:SUB-REQ-018}}); SPC maintains plasma centre within ±2 cm derived from first-wall gap constraints ({{sub:SUB-REQ-020}}); VSC issues a trip demand within 200 μs of crossing the 10 cm / 50 m/s dual threshold ({{sub:SUB-REQ-021}}). The 200 μs budget breaks down as 50 μs VSC cycle + 100 μs IESS actuation chain + 50 μs margin before the MGI valve must open. {{ifc:IFC-REQ-010}} mandates hardwired normally-energised trip path, independent of software, verified by a two-phase test under {{ver:VER-REQ-011}}.

The q-profile handoff from ERP to MMS ({{ifc:IFC-REQ-011}}) specifies 1 kHz minimum rate at 50 flux surface resolution. NTM growth times of 10–100 ms make 2 ms latency acceptable on this path, contrasting with the 100 μs budget on the main ERP-SPC equilibrium path.

Next

Five subsystems require decomposition: Plasma Diagnostics Integration System, Fuel Injection and Burn Control, Magnet Safety and Protection System, Heating and Current Drive Control, and Plant Control and I&C System. Magnet Safety warrants priority — quench detection in 68 kA superconducting coils has comparable safety criticality to the IESS and interfaces with both the PCS and the Site Protection System. The three ARC orphans ({{arc:ARC-REQ-001}}, {{arc:ARC-REQ-002}}, {{arc:ARC-REQ-003}}) are architecture decision records and acceptable without trace links.