Motion Control Infrastructure Layer — Real-Time Protocol Engine, Network Management Controller, Procedure Data Recorder, Inter-Cart Fibre Link Requirements Complete
System
{{entity:Surgical Robot System}} ({{entity:Motion Control System}}) — continuing from session 356. The algorithmic pipeline ({{entity:Tremor Rejection Filter}}, {{entity:Motion Scaling Module}}, {{entity:Trajectory Generator}}, {{entity:Kinematics Engine}}, {{entity:Workspace Safety Enforcer}}, {{entity:Joint Servo Controller}}) was decomposed in sessions 340 and 348. This session closes the remaining gap: the four infrastructure components — {{entity:Real-Time Protocol Engine}}, {{entity:Network Management Controller}}, {{entity:Procedure Data Recorder}}, and {{entity:Inter-Cart Fibre Link}} — had PART_OF facts and Substrate classifications but no component-level requirements or interfaces. All four are now fully covered.
Decomposition
The infrastructure layer separates hardware-fixed timing elements from the algorithmic software layer. The {{entity:Real-Time Protocol Engine}} (hex {{hex:51F77208}}) is an FPGA-based deterministic communication processor that is the first link in the surgeon-to-instrument chain; the {{entity:Inter-Cart Fibre Link}} (hex {{hex:C6855008}}) is the dual-redundant single-mode fibre optic cable assembly that carries 6-DOF velocity frames from the {{entity:Console Computer}} (hex {{hex:D0F51018}}) to the patient side. The {{entity:Network Management Controller}} (hex {{hex:51B73818}}) manages EtherCAT distributed clock synchronisation across all servo nodes, and the {{entity:Procedure Data Recorder}} (hex {{hex:50851208}}) provides persistent kinematic recording via PCIe DMA.
flowchart LR
CC["Console Computer D0F51018"]
ICFL["Inter-Cart Fibre Link C6855008"]
RTPE["Real-Time Protocol Engine 51F77208"]
TRF["Tremor Rejection Filter 40A53108"]
NMC["Network Management Controller 51B73818"]
RTCN["Real-Time Compute Node D6B51018"]
PDR["Procedure Data Recorder 50851208"]
JSC["Joint Servo Controller 55F53018"]
CC -->|48-byte frames 1kHz| ICFL
ICFL -->|≤5μs jitter| RTPE
RTPE -->|6-DOF vel 1kHz| TRF
RTCN -->|DMA ≤10μs| PDR
NMC -->|EtherCAT 1ms| JSC
RTCN --> NMC
Analysis
The {{entity:Real-Time Protocol Engine}} classifies at {{hex:51F77208}} — Synthetic, Powered, Active, Processes Signals/Logic, System-Integrated, System-Essential. The {{trait:System-Essential}} trait drove the requirement for fault-halt behaviour: when no surgeon console frame arrives for 3ms, the RTPE must assert a link-fault and transmit a zero-velocity command within 1ms ({{sub:SUB-MAIN-072}}), providing the hardware-independent safe state that {{entity:Workspace Safety Enforcer}} alone cannot deliver during a software hang.
The {{entity:Inter-Cart Fibre Link}} classified at {{hex:C6855008}} — its key trait is complete galvanic isolation, which maps directly to IEC 60601-1 Clause 8.8 reinforced insulation requirements for the patient/surgeon boundary. This is the most safety-critical property of the link and is captured in {{sub:SUB-MAIN-079}}. Lint flagged duplicate architecture decisions ({{sys:ARC-MAIN-015}} and {{sys:ARC-MAIN-016}}) as near-identical to {{sys:ARC-MAIN-017}} — both tagged duplicate-of-ARC-MAIN-017 for cleanup in the QC session.
Requirements
Nine subsystem requirements were created this session:
- {{sub:SUB-MAIN-071}}: RTPE TDM frame scheduling jitter ≤1μs — derived from SYS-MAIN-001’s 1ms end-to-end latency budget
- {{sub:SUB-MAIN-072}}: RTPE fault-halt on 3 missed frames, zero-velocity within 1ms — derived from {{sys:SYS-MAIN-010}} emergency stop
- {{sub:SUB-MAIN-073}}: NMC EtherCAT distributed clock skew ≤500ns — derived from {{sys:SYS-MAIN-002}} single-fault detection
- {{sub:SUB-MAIN-074}}: NMC node isolation within 1 EtherCAT cycle on 2 missed responses — derived from {{sys:SYS-MAIN-016}} degraded-mode arm operation
- {{sub:SUB-MAIN-075}}: PDR 1kHz recording, ≤10ms write latency — derived from {{sys:SYS-MAIN-015}} kinematic data mandate
- {{sub:SUB-MAIN-076}}: PDR dual-mirror NVMe with 1s fault detection — derived from {{sys:SYS-MAIN-015}} continuous recording requirement
- {{sub:SUB-MAIN-077}}: ICFL 10Gbps, ≤100μs propagation at 10m — derived from {{sys:SYS-MAIN-007}} transmission latency
- {{sub:SUB-MAIN-078}}: ICFL redundant channel failover within 1ms without frame loss — derived from {{sys:SYS-MAIN-007}}
- {{sub:SUB-MAIN-079}}: ICFL galvanic isolation ≥4000 VAC reinforced — derived from {{sys:SYS-MAIN-006}} IEC 60601-1 compliance
Four interface requirements ({{ifc:IFC-MAIN-040}} through {{ifc:IFC-MAIN-043}}) cover the Console Computer → ICFL frame format, ICFL → RTPE delivery jitter, NMC → Joint Servo Controller EtherCAT PDO structure, and Real-Time Compute Node → PDR PCIe DMA. Four verification entries ({{sys:VER-MAIN-061}} through {{sys:VER-MAIN-064}}) were created for each new interface, plus VER-MAIN-064 closes the previously unverified {{ifc:IFC-MAIN-025}} (Motion Scaling Module → Trajectory Generator ring-buffer path). VER/IFC coverage is now 64/43 (>100% because some IFC requirements have multiple VER entries). All seven orphaned requirements were linked; the three remaining orphans are ARC entries, which do not require trace links by convention.
Next
Safety and Watchdog System needs expansion: only {{entity:Watchdog Timer Controller}} has a PART_OF fact, while {{entity:Safe State Manager}}, {{entity:Communication Monitor}}, {{entity:Joint Force Monitor}}, and {{entity:Emergency Stop Chain}} exist as entities in the namespace without component-level requirements or interfaces. Two near-duplicate ARC entries (ARC-MAIN-015, ARC-MAIN-016) should be deleted in the next QC session.